Heptane Computer Processor

The world's only 65 bit processor

The heptane computer processor is a project to create a very fast computer processor in verilog harware description language, which will execute 6 instructions per clock cycle and will run at above 2GHz if implemented on a modern chip process. It will be designed with ease of translation to x86/x64 arhitecture, and have about 80% native performance software translator for it. It will target the x86/x84 market via translation and also will feature native mode operating systerms. 
In practice, it could be used for:
High performance tablet (single core).
High performance laptop (dual core).
High performance desktop.
Servers and cloud.

It will be available for licensing once it's ready.
Check out more detailed description here:

Before starting the heptane project, I had written another, scalar risc processor, which i'm releasing as open source.

Kickstarter Campaign (failed):

Currently the instruction set is finalised except iommu/io apic/device handling.

GCC porting has started!
GAS assembler already assembles many instructions including floating point.
The heptane processor will now allow derrivative works. However, physical implementations will require additional permission from me.
Source code unpublished but can be given upon request if serious intentions.
As of July 2019, the IPC will be 6 rather than 9.
Floating point unit completed.
ISA specification

As of friday 10 July 2020, the heptane ISA (instruction set architecture) will be free e.g. anyone can implement it.
However, the core source code itself remains restricted.
And I would appreciate if any implementors of the ISA didn't add custom instructions.
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